
spi-test:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400990 <_init>:
  400990:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400994:	910003fd 	mov	x29, sp
  400998:	94000078 	bl	400b78 <call_weak_fn>
  40099c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4009a0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004009b0 <.plt>:
  4009b0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4009b4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xf260>
  4009b8:	f947fe11 	ldr	x17, [x16, #4088]
  4009bc:	913fe210 	add	x16, x16, #0xff8
  4009c0:	d61f0220 	br	x17
  4009c4:	d503201f 	nop
  4009c8:	d503201f 	nop
  4009cc:	d503201f 	nop

00000000004009d0 <memcpy@plt>:
  4009d0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  4009d4:	f9400211 	ldr	x17, [x16]
  4009d8:	91000210 	add	x16, x16, #0x0
  4009dc:	d61f0220 	br	x17

00000000004009e0 <strtok@plt>:
  4009e0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  4009e4:	f9400611 	ldr	x17, [x16, #8]
  4009e8:	91002210 	add	x16, x16, #0x8
  4009ec:	d61f0220 	br	x17

00000000004009f0 <exit@plt>:
  4009f0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  4009f4:	f9400a11 	ldr	x17, [x16, #16]
  4009f8:	91004210 	add	x16, x16, #0x10
  4009fc:	d61f0220 	br	x17

0000000000400a00 <perror@plt>:
  400a00:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a04:	f9400e11 	ldr	x17, [x16, #24]
  400a08:	91006210 	add	x16, x16, #0x18
  400a0c:	d61f0220 	br	x17

0000000000400a10 <fclose@plt>:
  400a10:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a14:	f9401211 	ldr	x17, [x16, #32]
  400a18:	91008210 	add	x16, x16, #0x20
  400a1c:	d61f0220 	br	x17

0000000000400a20 <fopen@plt>:
  400a20:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a24:	f9401611 	ldr	x17, [x16, #40]
  400a28:	9100a210 	add	x16, x16, #0x28
  400a2c:	d61f0220 	br	x17

0000000000400a30 <malloc@plt>:
  400a30:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a34:	f9401a11 	ldr	x17, [x16, #48]
  400a38:	9100c210 	add	x16, x16, #0x30
  400a3c:	d61f0220 	br	x17

0000000000400a40 <open@plt>:
  400a40:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a44:	f9401e11 	ldr	x17, [x16, #56]
  400a48:	9100e210 	add	x16, x16, #0x38
  400a4c:	d61f0220 	br	x17

0000000000400a50 <__libc_start_main@plt>:
  400a50:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a54:	f9402211 	ldr	x17, [x16, #64]
  400a58:	91010210 	add	x16, x16, #0x40
  400a5c:	d61f0220 	br	x17

0000000000400a60 <memset@plt>:
  400a60:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a64:	f9402611 	ldr	x17, [x16, #72]
  400a68:	91012210 	add	x16, x16, #0x48
  400a6c:	d61f0220 	br	x17

0000000000400a70 <realloc@plt>:
  400a70:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a74:	f9402a11 	ldr	x17, [x16, #80]
  400a78:	91014210 	add	x16, x16, #0x50
  400a7c:	d61f0220 	br	x17

0000000000400a80 <close@plt>:
  400a80:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a84:	f9402e11 	ldr	x17, [x16, #88]
  400a88:	91016210 	add	x16, x16, #0x58
  400a8c:	d61f0220 	br	x17

0000000000400a90 <__gmon_start__@plt>:
  400a90:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400a94:	f9403211 	ldr	x17, [x16, #96]
  400a98:	91018210 	add	x16, x16, #0x60
  400a9c:	d61f0220 	br	x17

0000000000400aa0 <abort@plt>:
  400aa0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400aa4:	f9403611 	ldr	x17, [x16, #104]
  400aa8:	9101a210 	add	x16, x16, #0x68
  400aac:	d61f0220 	br	x17

0000000000400ab0 <puts@plt>:
  400ab0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400ab4:	f9403a11 	ldr	x17, [x16, #112]
  400ab8:	9101c210 	add	x16, x16, #0x70
  400abc:	d61f0220 	br	x17

0000000000400ac0 <getopt_long@plt>:
  400ac0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400ac4:	f9403e11 	ldr	x17, [x16, #120]
  400ac8:	9101e210 	add	x16, x16, #0x78
  400acc:	d61f0220 	br	x17

0000000000400ad0 <strtol@plt>:
  400ad0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400ad4:	f9404211 	ldr	x17, [x16, #128]
  400ad8:	91020210 	add	x16, x16, #0x80
  400adc:	d61f0220 	br	x17

0000000000400ae0 <fread@plt>:
  400ae0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400ae4:	f9404611 	ldr	x17, [x16, #136]
  400ae8:	91022210 	add	x16, x16, #0x88
  400aec:	d61f0220 	br	x17

0000000000400af0 <printf@plt>:
  400af0:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400af4:	f9404a11 	ldr	x17, [x16, #144]
  400af8:	91024210 	add	x16, x16, #0x90
  400afc:	d61f0220 	br	x17

0000000000400b00 <putchar@plt>:
  400b00:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400b04:	f9404e11 	ldr	x17, [x16, #152]
  400b08:	91026210 	add	x16, x16, #0x98
  400b0c:	d61f0220 	br	x17

0000000000400b10 <ioctl@plt>:
  400b10:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400b14:	f9405211 	ldr	x17, [x16, #160]
  400b18:	91028210 	add	x16, x16, #0xa0
  400b1c:	d61f0220 	br	x17

0000000000400b20 <ferror@plt>:
  400b20:	d0000090 	adrp	x16, 412000 <memcpy@GLIBC_2.17>
  400b24:	f9405611 	ldr	x17, [x16, #168]
  400b28:	9102a210 	add	x16, x16, #0xa8
  400b2c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400b30 <_start>:
  400b30:	d280001d 	mov	x29, #0x0                   	// #0
  400b34:	d280001e 	mov	x30, #0x0                   	// #0
  400b38:	aa0003e5 	mov	x5, x0
  400b3c:	f94003e1 	ldr	x1, [sp]
  400b40:	910023e2 	add	x2, sp, #0x8
  400b44:	910003e6 	mov	x6, sp
  400b48:	580000c0 	ldr	x0, 400b60 <_start+0x30>
  400b4c:	580000e3 	ldr	x3, 400b68 <_start+0x38>
  400b50:	58000104 	ldr	x4, 400b70 <_start+0x40>
  400b54:	97ffffbf 	bl	400a50 <__libc_start_main@plt>
  400b58:	97ffffd2 	bl	400aa0 <abort@plt>
  400b5c:	00000000 	.inst	0x00000000 ; undefined
  400b60:	00401480 	.word	0x00401480
  400b64:	00000000 	.word	0x00000000
  400b68:	00401708 	.word	0x00401708
  400b6c:	00000000 	.word	0x00000000
  400b70:	00401788 	.word	0x00401788
  400b74:	00000000 	.word	0x00000000

0000000000400b78 <call_weak_fn>:
  400b78:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xf260>
  400b7c:	f947f000 	ldr	x0, [x0, #4064]
  400b80:	b4000040 	cbz	x0, 400b88 <call_weak_fn+0x10>
  400b84:	17ffffc3 	b	400a90 <__gmon_start__@plt>
  400b88:	d65f03c0 	ret
  400b8c:	00000000 	.inst	0x00000000 ; undefined

0000000000400b90 <deregister_tm_clones>:
  400b90:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400b94:	91034000 	add	x0, x0, #0xd0
  400b98:	d0000081 	adrp	x1, 412000 <memcpy@GLIBC_2.17>
  400b9c:	91034021 	add	x1, x1, #0xd0
  400ba0:	eb00003f 	cmp	x1, x0
  400ba4:	540000a0 	b.eq	400bb8 <deregister_tm_clones+0x28>  // b.none
  400ba8:	b0000001 	adrp	x1, 401000 <parse_opts+0x8c>
  400bac:	f943d421 	ldr	x1, [x1, #1960]
  400bb0:	b4000041 	cbz	x1, 400bb8 <deregister_tm_clones+0x28>
  400bb4:	d61f0020 	br	x1
  400bb8:	d65f03c0 	ret
  400bbc:	d503201f 	nop

0000000000400bc0 <register_tm_clones>:
  400bc0:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400bc4:	91034000 	add	x0, x0, #0xd0
  400bc8:	d0000081 	adrp	x1, 412000 <memcpy@GLIBC_2.17>
  400bcc:	91034021 	add	x1, x1, #0xd0
  400bd0:	cb000021 	sub	x1, x1, x0
  400bd4:	9343fc21 	asr	x1, x1, #3
  400bd8:	8b41fc21 	add	x1, x1, x1, lsr #63
  400bdc:	9341fc21 	asr	x1, x1, #1
  400be0:	b40000a1 	cbz	x1, 400bf4 <register_tm_clones+0x34>
  400be4:	b0000002 	adrp	x2, 401000 <parse_opts+0x8c>
  400be8:	f943d842 	ldr	x2, [x2, #1968]
  400bec:	b4000042 	cbz	x2, 400bf4 <register_tm_clones+0x34>
  400bf0:	d61f0040 	br	x2
  400bf4:	d65f03c0 	ret

0000000000400bf8 <__do_global_dtors_aux>:
  400bf8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400bfc:	910003fd 	mov	x29, sp
  400c00:	f9000bf3 	str	x19, [sp, #16]
  400c04:	d0000093 	adrp	x19, 412000 <memcpy@GLIBC_2.17>
  400c08:	39437260 	ldrb	w0, [x19, #220]
  400c0c:	35000080 	cbnz	w0, 400c1c <__do_global_dtors_aux+0x24>
  400c10:	97ffffe0 	bl	400b90 <deregister_tm_clones>
  400c14:	52800020 	mov	w0, #0x1                   	// #1
  400c18:	39037260 	strb	w0, [x19, #220]
  400c1c:	f9400bf3 	ldr	x19, [sp, #16]
  400c20:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400c24:	d65f03c0 	ret

0000000000400c28 <frame_dummy>:
  400c28:	17ffffe6 	b	400bc0 <register_tm_clones>

0000000000400c2c <pabort>:
  400c2c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400c30:	910003fd 	mov	x29, sp
  400c34:	f9000fa0 	str	x0, [x29, #24]
  400c38:	f9400fa0 	ldr	x0, [x29, #24]
  400c3c:	97ffff71 	bl	400a00 <perror@plt>
  400c40:	97ffff98 	bl	400aa0 <abort@plt>

0000000000400c44 <add_transfer>:
  400c44:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400c48:	910003fd 	mov	x29, sp
  400c4c:	f9000fa0 	str	x0, [x29, #24]
  400c50:	b90017a1 	str	w1, [x29, #20]
  400c54:	b98017a0 	ldrsw	x0, [x29, #20]
  400c58:	97ffff76 	bl	400a30 <malloc@plt>
  400c5c:	f9001fa0 	str	x0, [x29, #56]
  400c60:	b98017a0 	ldrsw	x0, [x29, #20]
  400c64:	97ffff73 	bl	400a30 <malloc@plt>
  400c68:	f9001ba0 	str	x0, [x29, #48]
  400c6c:	b98017a0 	ldrsw	x0, [x29, #20]
  400c70:	aa0003e2 	mov	x2, x0
  400c74:	f9400fa1 	ldr	x1, [x29, #24]
  400c78:	f9401fa0 	ldr	x0, [x29, #56]
  400c7c:	97ffff55 	bl	4009d0 <memcpy@plt>
  400c80:	b98017a0 	ldrsw	x0, [x29, #20]
  400c84:	aa0003e2 	mov	x2, x0
  400c88:	52801fe1 	mov	w1, #0xff                  	// #255
  400c8c:	f9401ba0 	ldr	x0, [x29, #48]
  400c90:	97ffff74 	bl	400a60 <memset@plt>
  400c94:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400c98:	9103c000 	add	x0, x0, #0xf0
  400c9c:	b9400000 	ldr	w0, [x0]
  400ca0:	11000401 	add	w1, w0, #0x1
  400ca4:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400ca8:	9103c000 	add	x0, x0, #0xf0
  400cac:	b9000001 	str	w1, [x0]
  400cb0:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400cb4:	9103a000 	add	x0, x0, #0xe8
  400cb8:	f9400002 	ldr	x2, [x0]
  400cbc:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400cc0:	9103c000 	add	x0, x0, #0xf0
  400cc4:	b9400000 	ldr	w0, [x0]
  400cc8:	93407c00 	sxtw	x0, w0
  400ccc:	d37be800 	lsl	x0, x0, #5
  400cd0:	aa0003e1 	mov	x1, x0
  400cd4:	aa0203e0 	mov	x0, x2
  400cd8:	97ffff66 	bl	400a70 <realloc@plt>
  400cdc:	aa0003e1 	mov	x1, x0
  400ce0:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400ce4:	9103a000 	add	x0, x0, #0xe8
  400ce8:	f9000001 	str	x1, [x0]
  400cec:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400cf0:	9103a000 	add	x0, x0, #0xe8
  400cf4:	f9400001 	ldr	x1, [x0]
  400cf8:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400cfc:	9103c000 	add	x0, x0, #0xf0
  400d00:	b9400000 	ldr	w0, [x0]
  400d04:	93407c00 	sxtw	x0, w0
  400d08:	d37be800 	lsl	x0, x0, #5
  400d0c:	d1008000 	sub	x0, x0, #0x20
  400d10:	8b000020 	add	x0, x1, x0
  400d14:	f90017a0 	str	x0, [x29, #40]
  400d18:	f9401fa1 	ldr	x1, [x29, #56]
  400d1c:	f94017a0 	ldr	x0, [x29, #40]
  400d20:	f9000001 	str	x1, [x0]
  400d24:	f9401ba1 	ldr	x1, [x29, #48]
  400d28:	f94017a0 	ldr	x0, [x29, #40]
  400d2c:	f9000401 	str	x1, [x0, #8]
  400d30:	b94017a1 	ldr	w1, [x29, #20]
  400d34:	f94017a0 	ldr	x0, [x29, #40]
  400d38:	b9001001 	str	w1, [x0, #16]
  400d3c:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400d40:	91033000 	add	x0, x0, #0xcc
  400d44:	b9400001 	ldr	w1, [x0]
  400d48:	f94017a0 	ldr	x0, [x29, #40]
  400d4c:	b9001401 	str	w1, [x0, #20]
  400d50:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400d54:	91038800 	add	x0, x0, #0xe2
  400d58:	79400001 	ldrh	w1, [x0]
  400d5c:	f94017a0 	ldr	x0, [x29, #40]
  400d60:	79003001 	strh	w1, [x0, #24]
  400d64:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400d68:	91032000 	add	x0, x0, #0xc8
  400d6c:	39400001 	ldrb	w1, [x0]
  400d70:	f94017a0 	ldr	x0, [x29, #40]
  400d74:	39006801 	strb	w1, [x0, #26]
  400d78:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400d7c:	9103d000 	add	x0, x0, #0xf4
  400d80:	b9400000 	ldr	w0, [x0]
  400d84:	12001c01 	and	w1, w0, #0xff
  400d88:	f94017a0 	ldr	x0, [x29, #40]
  400d8c:	39006c01 	strb	w1, [x0, #27]
  400d90:	f94017a0 	ldr	x0, [x29, #40]
  400d94:	79003c1f 	strh	wzr, [x0, #30]
  400d98:	d503201f 	nop
  400d9c:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400da0:	d65f03c0 	ret

0000000000400da4 <show_spi_xfrs>:
  400da4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400da8:	910003fd 	mov	x29, sp
  400dac:	b9001fbf 	str	wzr, [x29, #28]
  400db0:	14000036 	b	400e88 <show_spi_xfrs+0xe4>
  400db4:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400db8:	9103a000 	add	x0, x0, #0xe8
  400dbc:	f9400001 	ldr	x1, [x0]
  400dc0:	b9801fa0 	ldrsw	x0, [x29, #28]
  400dc4:	d37be800 	lsl	x0, x0, #5
  400dc8:	8b000020 	add	x0, x1, x0
  400dcc:	f9000ba0 	str	x0, [x29, #16]
  400dd0:	b9001bbf 	str	wzr, [x29, #24]
  400dd4:	1400000d 	b	400e08 <show_spi_xfrs+0x64>
  400dd8:	b9801ba1 	ldrsw	x1, [x29, #24]
  400ddc:	f9400ba0 	ldr	x0, [x29, #16]
  400de0:	f9400000 	ldr	x0, [x0]
  400de4:	8b000020 	add	x0, x1, x0
  400de8:	39400000 	ldrb	w0, [x0]
  400dec:	2a0003e1 	mov	w1, w0
  400df0:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400df4:	911f2000 	add	x0, x0, #0x7c8
  400df8:	97ffff3e 	bl	400af0 <printf@plt>
  400dfc:	b9401ba0 	ldr	w0, [x29, #24]
  400e00:	11000400 	add	w0, w0, #0x1
  400e04:	b9001ba0 	str	w0, [x29, #24]
  400e08:	f9400ba0 	ldr	x0, [x29, #16]
  400e0c:	b9401001 	ldr	w1, [x0, #16]
  400e10:	b9401ba0 	ldr	w0, [x29, #24]
  400e14:	6b00003f 	cmp	w1, w0
  400e18:	54fffe08 	b.hi	400dd8 <show_spi_xfrs+0x34>  // b.pmore
  400e1c:	52800140 	mov	w0, #0xa                   	// #10
  400e20:	97ffff38 	bl	400b00 <putchar@plt>
  400e24:	b9001bbf 	str	wzr, [x29, #24]
  400e28:	1400000d 	b	400e5c <show_spi_xfrs+0xb8>
  400e2c:	b9801ba1 	ldrsw	x1, [x29, #24]
  400e30:	f9400ba0 	ldr	x0, [x29, #16]
  400e34:	f9400400 	ldr	x0, [x0, #8]
  400e38:	8b000020 	add	x0, x1, x0
  400e3c:	39400000 	ldrb	w0, [x0]
  400e40:	2a0003e1 	mov	w1, w0
  400e44:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400e48:	911f2000 	add	x0, x0, #0x7c8
  400e4c:	97ffff29 	bl	400af0 <printf@plt>
  400e50:	b9401ba0 	ldr	w0, [x29, #24]
  400e54:	11000400 	add	w0, w0, #0x1
  400e58:	b9001ba0 	str	w0, [x29, #24]
  400e5c:	f9400ba0 	ldr	x0, [x29, #16]
  400e60:	b9401001 	ldr	w1, [x0, #16]
  400e64:	b9401ba0 	ldr	w0, [x29, #24]
  400e68:	6b00003f 	cmp	w1, w0
  400e6c:	54fffe08 	b.hi	400e2c <show_spi_xfrs+0x88>  // b.pmore
  400e70:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400e74:	911f4000 	add	x0, x0, #0x7d0
  400e78:	97ffff0e 	bl	400ab0 <puts@plt>
  400e7c:	b9401fa0 	ldr	w0, [x29, #28]
  400e80:	11000400 	add	w0, w0, #0x1
  400e84:	b9001fa0 	str	w0, [x29, #28]
  400e88:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400e8c:	9103c000 	add	x0, x0, #0xf0
  400e90:	b9400000 	ldr	w0, [x0]
  400e94:	b9401fa1 	ldr	w1, [x29, #28]
  400e98:	6b00003f 	cmp	w1, w0
  400e9c:	54fff8cb 	b.lt	400db4 <show_spi_xfrs+0x10>  // b.tstop
  400ea0:	d503201f 	nop
  400ea4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400ea8:	d65f03c0 	ret

0000000000400eac <transfer>:
  400eac:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400eb0:	910003fd 	mov	x29, sp
  400eb4:	b9001fa0 	str	w0, [x29, #28]
  400eb8:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400ebc:	9103c000 	add	x0, x0, #0xf0
  400ec0:	b9400000 	ldr	w0, [x0]
  400ec4:	93407c00 	sxtw	x0, w0
  400ec8:	d37be801 	lsl	x1, x0, #5
  400ecc:	d287ffe0 	mov	x0, #0x3fff                	// #16383
  400ed0:	eb00003f 	cmp	x1, x0
  400ed4:	540000e8 	b.hi	400ef0 <transfer+0x44>  // b.pmore
  400ed8:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400edc:	9103c000 	add	x0, x0, #0xf0
  400ee0:	b9400000 	ldr	w0, [x0]
  400ee4:	93407c00 	sxtw	x0, w0
  400ee8:	d37be800 	lsl	x0, x0, #5
  400eec:	14000002 	b	400ef4 <transfer+0x48>
  400ef0:	d2800000 	mov	x0, #0x0                   	// #0
  400ef4:	d370bc01 	lsl	x1, x0, #16
  400ef8:	d28d6000 	mov	x0, #0x6b00                	// #27392
  400efc:	f2a80000 	movk	x0, #0x4000, lsl #16
  400f00:	aa000021 	orr	x1, x1, x0
  400f04:	d0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  400f08:	9103a000 	add	x0, x0, #0xe8
  400f0c:	f9400000 	ldr	x0, [x0]
  400f10:	aa0003e2 	mov	x2, x0
  400f14:	b9401fa0 	ldr	w0, [x29, #28]
  400f18:	97fffefe 	bl	400b10 <ioctl@plt>
  400f1c:	b9002fa0 	str	w0, [x29, #44]
  400f20:	b9402fa0 	ldr	w0, [x29, #44]
  400f24:	7100001f 	cmp	w0, #0x0
  400f28:	5400008c 	b.gt	400f38 <transfer+0x8c>
  400f2c:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400f30:	911f6000 	add	x0, x0, #0x7d8
  400f34:	97ffff3e 	bl	400c2c <pabort>
  400f38:	d503201f 	nop
  400f3c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400f40:	d65f03c0 	ret

0000000000400f44 <print_usage>:
  400f44:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400f48:	910003fd 	mov	x29, sp
  400f4c:	f9000fa0 	str	x0, [x29, #24]
  400f50:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400f54:	911fc000 	add	x0, x0, #0x7f0
  400f58:	f9400fa1 	ldr	x1, [x29, #24]
  400f5c:	97fffee5 	bl	400af0 <printf@plt>
  400f60:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400f64:	91206000 	add	x0, x0, #0x818
  400f68:	97fffed2 	bl	400ab0 <puts@plt>
  400f6c:	52800020 	mov	w0, #0x1                   	// #1
  400f70:	97fffea0 	bl	4009f0 <exit@plt>

0000000000400f74 <parse_opts>:
  400f74:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400f78:	910003fd 	mov	x29, sp
  400f7c:	b9001fa0 	str	w0, [x29, #28]
  400f80:	f9000ba1 	str	x1, [x29, #16]
  400f84:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400f88:	912f0001 	add	x1, x0, #0xbc0
  400f8c:	b0000000 	adrp	x0, 401000 <parse_opts+0x8c>
  400f90:	9128a000 	add	x0, x0, #0xa28
  400f94:	d2800004 	mov	x4, #0x0                   	// #0
  400f98:	aa0103e3 	mov	x3, x1
  400f9c:	aa0003e2 	mov	x2, x0
  400fa0:	f9400ba1 	ldr	x1, [x29, #16]
  400fa4:	b9401fa0 	ldr	w0, [x29, #28]
  400fa8:	97fffec6 	bl	400ac0 <getopt_long@plt>
  400fac:	b9002fa0 	str	w0, [x29, #44]
  400fb0:	b9402fa0 	ldr	w0, [x29, #44]
  400fb4:	3100041f 	cmn	w0, #0x1
  400fb8:	540015a0 	b.eq	40126c <parse_opts+0x2f8>  // b.none
  400fbc:	b9402fa0 	ldr	w0, [x29, #44]
  400fc0:	71013c1f 	cmp	w0, #0x4f
  400fc4:	54000d40 	b.eq	40116c <parse_opts+0x1f8>  // b.none
  400fc8:	71013c1f 	cmp	w0, #0x4f
  400fcc:	5400022c 	b.gt	401010 <parse_opts+0x9c>
  400fd0:	7101101f 	cmp	w0, #0x44
  400fd4:	54000420 	b.eq	401058 <parse_opts+0xe4>  // b.none
  400fd8:	7101101f 	cmp	w0, #0x44
  400fdc:	540000cc 	b.gt	400ff4 <parse_opts+0x80>
  400fe0:	7100cc1f 	cmp	w0, #0x33
  400fe4:	54000fa0 	b.eq	4011d8 <parse_opts+0x264>  // b.none
  400fe8:	71010c1f 	cmp	w0, #0x43
  400fec:	54000e40 	b.eq	4011b4 <parse_opts+0x240>  // b.none
  400ff0:	1400009a 	b	401258 <parse_opts+0x2e4>
  400ff4:	7101301f 	cmp	w0, #0x4c
  400ff8:	54000cc0 	b.eq	401190 <parse_opts+0x21c>  // b.none
  400ffc:	7101381f 	cmp	w0, #0x4e
  401000:	54000fe0 	b.eq	4011fc <parse_opts+0x288>  // b.none
  401004:	7101201f 	cmp	w0, #0x48
  401008:	54000a00 	b.eq	401148 <parse_opts+0x1d4>  // b.none
  40100c:	14000093 	b	401258 <parse_opts+0x2e4>
  401010:	7101b01f 	cmp	w0, #0x6c
  401014:	54000880 	b.eq	401124 <parse_opts+0x1b0>  // b.none
  401018:	7101b01f 	cmp	w0, #0x6c
  40101c:	5400010c 	b.gt	40103c <parse_opts+0xc8>
  401020:	7101881f 	cmp	w0, #0x62
  401024:	54000540 	b.eq	4010cc <parse_opts+0x158>  // b.none
  401028:	7101901f 	cmp	w0, #0x64
  40102c:	540003a0 	b.eq	4010a0 <parse_opts+0x12c>  // b.none
  401030:	7101481f 	cmp	w0, #0x52
  401034:	54000f60 	b.eq	401220 <parse_opts+0x2ac>  // b.none
  401038:	14000088 	b	401258 <parse_opts+0x2e4>
  40103c:	7101c41f 	cmp	w0, #0x71
  401040:	54001020 	b.eq	401244 <parse_opts+0x2d0>  // b.none
  401044:	7101cc1f 	cmp	w0, #0x73
  401048:	54000160 	b.eq	401074 <parse_opts+0x100>  // b.none
  40104c:	7101b81f 	cmp	w0, #0x6e
  401050:	54000540 	b.eq	4010f8 <parse_opts+0x184>  // b.none
  401054:	14000081 	b	401258 <parse_opts+0x2e4>
  401058:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  40105c:	91034000 	add	x0, x0, #0xd0
  401060:	f9400001 	ldr	x1, [x0]
  401064:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401068:	91030000 	add	x0, x0, #0xc0
  40106c:	f9000001 	str	x1, [x0]
  401070:	1400007e 	b	401268 <parse_opts+0x2f4>
  401074:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401078:	91034000 	add	x0, x0, #0xd0
  40107c:	f9400000 	ldr	x0, [x0]
  401080:	52800002 	mov	w2, #0x0                   	// #0
  401084:	d2800001 	mov	x1, #0x0                   	// #0
  401088:	97fffe92 	bl	400ad0 <strtol@plt>
  40108c:	2a0003e1 	mov	w1, w0
  401090:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401094:	91033000 	add	x0, x0, #0xcc
  401098:	b9000001 	str	w1, [x0]
  40109c:	14000073 	b	401268 <parse_opts+0x2f4>
  4010a0:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4010a4:	91034000 	add	x0, x0, #0xd0
  4010a8:	f9400000 	ldr	x0, [x0]
  4010ac:	52800002 	mov	w2, #0x0                   	// #0
  4010b0:	d2800001 	mov	x1, #0x0                   	// #0
  4010b4:	97fffe87 	bl	400ad0 <strtol@plt>
  4010b8:	12003c01 	and	w1, w0, #0xffff
  4010bc:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4010c0:	91038800 	add	x0, x0, #0xe2
  4010c4:	79000001 	strh	w1, [x0]
  4010c8:	14000068 	b	401268 <parse_opts+0x2f4>
  4010cc:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4010d0:	91034000 	add	x0, x0, #0xd0
  4010d4:	f9400000 	ldr	x0, [x0]
  4010d8:	52800002 	mov	w2, #0x0                   	// #0
  4010dc:	d2800001 	mov	x1, #0x0                   	// #0
  4010e0:	97fffe7c 	bl	400ad0 <strtol@plt>
  4010e4:	12001c01 	and	w1, w0, #0xff
  4010e8:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4010ec:	91032000 	add	x0, x0, #0xc8
  4010f0:	39000001 	strb	w1, [x0]
  4010f4:	1400005d 	b	401268 <parse_opts+0x2f4>
  4010f8:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4010fc:	91034000 	add	x0, x0, #0xd0
  401100:	f9400000 	ldr	x0, [x0]
  401104:	52800002 	mov	w2, #0x0                   	// #0
  401108:	d2800001 	mov	x1, #0x0                   	// #0
  40110c:	97fffe71 	bl	400ad0 <strtol@plt>
  401110:	2a0003e1 	mov	w1, w0
  401114:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401118:	9103e000 	add	x0, x0, #0xf8
  40111c:	b9000001 	str	w1, [x0]
  401120:	14000052 	b	401268 <parse_opts+0x2f4>
  401124:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401128:	91038000 	add	x0, x0, #0xe0
  40112c:	39400000 	ldrb	w0, [x0]
  401130:	321b0000 	orr	w0, w0, #0x20
  401134:	12001c01 	and	w1, w0, #0xff
  401138:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  40113c:	91038000 	add	x0, x0, #0xe0
  401140:	39000001 	strb	w1, [x0]
  401144:	14000049 	b	401268 <parse_opts+0x2f4>
  401148:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  40114c:	91038000 	add	x0, x0, #0xe0
  401150:	39400000 	ldrb	w0, [x0]
  401154:	32000000 	orr	w0, w0, #0x1
  401158:	12001c01 	and	w1, w0, #0xff
  40115c:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401160:	91038000 	add	x0, x0, #0xe0
  401164:	39000001 	strb	w1, [x0]
  401168:	14000040 	b	401268 <parse_opts+0x2f4>
  40116c:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401170:	91038000 	add	x0, x0, #0xe0
  401174:	39400000 	ldrb	w0, [x0]
  401178:	321f0000 	orr	w0, w0, #0x2
  40117c:	12001c01 	and	w1, w0, #0xff
  401180:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401184:	91038000 	add	x0, x0, #0xe0
  401188:	39000001 	strb	w1, [x0]
  40118c:	14000037 	b	401268 <parse_opts+0x2f4>
  401190:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401194:	91038000 	add	x0, x0, #0xe0
  401198:	39400000 	ldrb	w0, [x0]
  40119c:	321d0000 	orr	w0, w0, #0x8
  4011a0:	12001c01 	and	w1, w0, #0xff
  4011a4:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4011a8:	91038000 	add	x0, x0, #0xe0
  4011ac:	39000001 	strb	w1, [x0]
  4011b0:	1400002e 	b	401268 <parse_opts+0x2f4>
  4011b4:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4011b8:	91038000 	add	x0, x0, #0xe0
  4011bc:	39400000 	ldrb	w0, [x0]
  4011c0:	321e0000 	orr	w0, w0, #0x4
  4011c4:	12001c01 	and	w1, w0, #0xff
  4011c8:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4011cc:	91038000 	add	x0, x0, #0xe0
  4011d0:	39000001 	strb	w1, [x0]
  4011d4:	14000025 	b	401268 <parse_opts+0x2f4>
  4011d8:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4011dc:	91038000 	add	x0, x0, #0xe0
  4011e0:	39400000 	ldrb	w0, [x0]
  4011e4:	321c0000 	orr	w0, w0, #0x10
  4011e8:	12001c01 	and	w1, w0, #0xff
  4011ec:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4011f0:	91038000 	add	x0, x0, #0xe0
  4011f4:	39000001 	strb	w1, [x0]
  4011f8:	1400001c 	b	401268 <parse_opts+0x2f4>
  4011fc:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401200:	91038000 	add	x0, x0, #0xe0
  401204:	39400000 	ldrb	w0, [x0]
  401208:	321a0000 	orr	w0, w0, #0x40
  40120c:	12001c01 	and	w1, w0, #0xff
  401210:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401214:	91038000 	add	x0, x0, #0xe0
  401218:	39000001 	strb	w1, [x0]
  40121c:	14000013 	b	401268 <parse_opts+0x2f4>
  401220:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401224:	91038000 	add	x0, x0, #0xe0
  401228:	39400000 	ldrb	w0, [x0]
  40122c:	32196000 	orr	w0, w0, #0xffffff80
  401230:	12001c01 	and	w1, w0, #0xff
  401234:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401238:	91038000 	add	x0, x0, #0xe0
  40123c:	39000001 	strb	w1, [x0]
  401240:	1400000a 	b	401268 <parse_opts+0x2f4>
  401244:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401248:	9103f000 	add	x0, x0, #0xfc
  40124c:	52800021 	mov	w1, #0x1                   	// #1
  401250:	b9000001 	str	w1, [x0]
  401254:	14000005 	b	401268 <parse_opts+0x2f4>
  401258:	f9400ba0 	ldr	x0, [x29, #16]
  40125c:	f9400000 	ldr	x0, [x0]
  401260:	97ffff39 	bl	400f44 <print_usage>
  401264:	d503201f 	nop
  401268:	17ffff47 	b	400f84 <parse_opts+0x10>
  40126c:	d503201f 	nop
  401270:	d503201f 	nop
  401274:	a8c37bfd 	ldp	x29, x30, [sp], #48
  401278:	d65f03c0 	ret

000000000040127c <parse_transfer>:
  40127c:	d2840810 	mov	x16, #0x2040                	// #8256
  401280:	cb3063ff 	sub	sp, sp, x16
  401284:	a9007bfd 	stp	x29, x30, [sp]
  401288:	910003fd 	mov	x29, sp
  40128c:	f9000fa0 	str	x0, [x29, #24]
  401290:	b9203fbf 	str	wzr, [x29, #8252]
  401294:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401298:	91290000 	add	x0, x0, #0xa40
  40129c:	aa0003e1 	mov	x1, x0
  4012a0:	f9400fa0 	ldr	x0, [x29, #24]
  4012a4:	97fffdcf 	bl	4009e0 <strtok@plt>
  4012a8:	f9101ba0 	str	x0, [x29, #8240]
  4012ac:	14000050 	b	4013ec <parse_transfer+0x170>
  4012b0:	f9501ba0 	ldr	x0, [x29, #8240]
  4012b4:	39400000 	ldrb	w0, [x0]
  4012b8:	7101881f 	cmp	w0, #0x62
  4012bc:	540001a1 	b.ne	4012f0 <parse_transfer+0x74>  // b.any
  4012c0:	f9501ba0 	ldr	x0, [x29, #8240]
  4012c4:	91000400 	add	x0, x0, #0x1
  4012c8:	f9101ba0 	str	x0, [x29, #8240]
  4012cc:	52800002 	mov	w2, #0x0                   	// #0
  4012d0:	d2800001 	mov	x1, #0x0                   	// #0
  4012d4:	f9501ba0 	ldr	x0, [x29, #8240]
  4012d8:	97fffdfe 	bl	400ad0 <strtol@plt>
  4012dc:	12001c01 	and	w1, w0, #0xff
  4012e0:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4012e4:	91032000 	add	x0, x0, #0xc8
  4012e8:	39000001 	strb	w1, [x0]
  4012ec:	1400003a 	b	4013d4 <parse_transfer+0x158>
  4012f0:	f9501ba0 	ldr	x0, [x29, #8240]
  4012f4:	39400000 	ldrb	w0, [x0]
  4012f8:	7101001f 	cmp	w0, #0x40
  4012fc:	54000541 	b.ne	4013a4 <parse_transfer+0x128>  // b.any
  401300:	f9501ba0 	ldr	x0, [x29, #8240]
  401304:	91000400 	add	x0, x0, #0x1
  401308:	f9101ba0 	str	x0, [x29, #8240]
  40130c:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401310:	91292000 	add	x0, x0, #0xa48
  401314:	aa0003e1 	mov	x1, x0
  401318:	f9501ba0 	ldr	x0, [x29, #8240]
  40131c:	97fffdc1 	bl	400a20 <fopen@plt>
  401320:	f91017a0 	str	x0, [x29, #8232]
  401324:	f95017a0 	ldr	x0, [x29, #8232]
  401328:	f100001f 	cmp	x0, #0x0
  40132c:	54000121 	b.ne	401350 <parse_transfer+0xd4>  // b.any
  401330:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401334:	91294000 	add	x0, x0, #0xa50
  401338:	97fffdb2 	bl	400a00 <perror@plt>
  40133c:	52800020 	mov	w0, #0x1                   	// #1
  401340:	97fffdac 	bl	4009f0 <exit@plt>
  401344:	9100a3a0 	add	x0, x29, #0x28
  401348:	b9603fa1 	ldr	w1, [x29, #8252]
  40134c:	97fffe3e 	bl	400c44 <add_transfer>
  401350:	9100a3a0 	add	x0, x29, #0x28
  401354:	f95017a3 	ldr	x3, [x29, #8232]
  401358:	d2810002 	mov	x2, #0x800                 	// #2048
  40135c:	d2800021 	mov	x1, #0x1                   	// #1
  401360:	97fffde0 	bl	400ae0 <fread@plt>
  401364:	b9203fa0 	str	w0, [x29, #8252]
  401368:	b9603fa0 	ldr	w0, [x29, #8252]
  40136c:	7100001f 	cmp	w0, #0x0
  401370:	54fffeac 	b.gt	401344 <parse_transfer+0xc8>
  401374:	f95017a0 	ldr	x0, [x29, #8232]
  401378:	97fffdea 	bl	400b20 <ferror@plt>
  40137c:	7100001f 	cmp	w0, #0x0
  401380:	540000c0 	b.eq	401398 <parse_transfer+0x11c>  // b.none
  401384:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401388:	9129c000 	add	x0, x0, #0xa70
  40138c:	97fffd9d 	bl	400a00 <perror@plt>
  401390:	52800020 	mov	w0, #0x1                   	// #1
  401394:	97fffd97 	bl	4009f0 <exit@plt>
  401398:	f95017a0 	ldr	x0, [x29, #8232]
  40139c:	97fffd9d 	bl	400a10 <fclose@plt>
  4013a0:	1400000d 	b	4013d4 <parse_transfer+0x158>
  4013a4:	52800002 	mov	w2, #0x0                   	// #0
  4013a8:	d2800001 	mov	x1, #0x0                   	// #0
  4013ac:	f9501ba0 	ldr	x0, [x29, #8240]
  4013b0:	97fffdc8 	bl	400ad0 <strtol@plt>
  4013b4:	aa0003e2 	mov	x2, x0
  4013b8:	b9603fa0 	ldr	w0, [x29, #8252]
  4013bc:	11000401 	add	w1, w0, #0x1
  4013c0:	b9203fa1 	str	w1, [x29, #8252]
  4013c4:	12001c42 	and	w2, w2, #0xff
  4013c8:	93407c00 	sxtw	x0, w0
  4013cc:	9100a3a1 	add	x1, x29, #0x28
  4013d0:	38206822 	strb	w2, [x1, x0]
  4013d4:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  4013d8:	91290000 	add	x0, x0, #0xa40
  4013dc:	aa0003e1 	mov	x1, x0
  4013e0:	d2800000 	mov	x0, #0x0                   	// #0
  4013e4:	97fffd7f 	bl	4009e0 <strtok@plt>
  4013e8:	f9101ba0 	str	x0, [x29, #8240]
  4013ec:	f9501ba0 	ldr	x0, [x29, #8240]
  4013f0:	f100001f 	cmp	x0, #0x0
  4013f4:	54fff5e1 	b.ne	4012b0 <parse_transfer+0x34>  // b.any
  4013f8:	b9603fa0 	ldr	w0, [x29, #8252]
  4013fc:	7100001f 	cmp	w0, #0x0
  401400:	5400008d 	b.le	401410 <parse_transfer+0x194>
  401404:	9100a3a0 	add	x0, x29, #0x28
  401408:	b9603fa1 	ldr	w1, [x29, #8252]
  40140c:	97fffe0e 	bl	400c44 <add_transfer>
  401410:	d503201f 	nop
  401414:	a9407bfd 	ldp	x29, x30, [sp]
  401418:	d2840810 	mov	x16, #0x2040                	// #8256
  40141c:	8b3063ff 	add	sp, sp, x16
  401420:	d65f03c0 	ret

0000000000401424 <make_bulk_transfer>:
  401424:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  401428:	910003fd 	mov	x29, sp
  40142c:	b9001fa0 	str	w0, [x29, #28]
  401430:	b9801fa0 	ldrsw	x0, [x29, #28]
  401434:	97fffd7f 	bl	400a30 <malloc@plt>
  401438:	f90017a0 	str	x0, [x29, #40]
  40143c:	f94017a0 	ldr	x0, [x29, #40]
  401440:	f100001f 	cmp	x0, #0x0
  401444:	54000081 	b.ne	401454 <make_bulk_transfer+0x30>  // b.any
  401448:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  40144c:	912a4000 	add	x0, x0, #0xa90
  401450:	97fffdf7 	bl	400c2c <pabort>
  401454:	b9801fa0 	ldrsw	x0, [x29, #28]
  401458:	aa0003e2 	mov	x2, x0
  40145c:	52801961 	mov	w1, #0xcb                  	// #203
  401460:	f94017a0 	ldr	x0, [x29, #40]
  401464:	97fffd7f 	bl	400a60 <memset@plt>
  401468:	b9401fa1 	ldr	w1, [x29, #28]
  40146c:	f94017a0 	ldr	x0, [x29, #40]
  401470:	97fffdf5 	bl	400c44 <add_transfer>
  401474:	d503201f 	nop
  401478:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40147c:	d65f03c0 	ret

0000000000401480 <main>:
  401480:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  401484:	910003fd 	mov	x29, sp
  401488:	b9001fa0 	str	w0, [x29, #28]
  40148c:	f9000ba1 	str	x1, [x29, #16]
  401490:	b9002bbf 	str	wzr, [x29, #40]
  401494:	f9400ba1 	ldr	x1, [x29, #16]
  401498:	b9401fa0 	ldr	w0, [x29, #28]
  40149c:	97fffeb6 	bl	400f74 <parse_opts>
  4014a0:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4014a4:	9103e000 	add	x0, x0, #0xf8
  4014a8:	b9400000 	ldr	w0, [x0]
  4014ac:	7100001f 	cmp	w0, #0x0
  4014b0:	5400026d 	b.le	4014fc <main+0x7c>
  4014b4:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4014b8:	9103e000 	add	x0, x0, #0xf8
  4014bc:	b9400000 	ldr	w0, [x0]
  4014c0:	97ffffd9 	bl	401424 <make_bulk_transfer>
  4014c4:	14000014 	b	401514 <main+0x94>
  4014c8:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4014cc:	91036000 	add	x0, x0, #0xd8
  4014d0:	b9400000 	ldr	w0, [x0]
  4014d4:	11000402 	add	w2, w0, #0x1
  4014d8:	b0000081 	adrp	x1, 412000 <memcpy@GLIBC_2.17>
  4014dc:	91036021 	add	x1, x1, #0xd8
  4014e0:	b9000022 	str	w2, [x1]
  4014e4:	93407c00 	sxtw	x0, w0
  4014e8:	d37df000 	lsl	x0, x0, #3
  4014ec:	f9400ba1 	ldr	x1, [x29, #16]
  4014f0:	8b000020 	add	x0, x1, x0
  4014f4:	f9400000 	ldr	x0, [x0]
  4014f8:	97ffff61 	bl	40127c <parse_transfer>
  4014fc:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401500:	91036000 	add	x0, x0, #0xd8
  401504:	b9400000 	ldr	w0, [x0]
  401508:	b9401fa1 	ldr	w1, [x29, #28]
  40150c:	6b00003f 	cmp	w1, w0
  401510:	54fffdcc 	b.gt	4014c8 <main+0x48>
  401514:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401518:	91030000 	add	x0, x0, #0xc0
  40151c:	f9400000 	ldr	x0, [x0]
  401520:	52800041 	mov	w1, #0x2                   	// #2
  401524:	97fffd47 	bl	400a40 <open@plt>
  401528:	b90027a0 	str	w0, [x29, #36]
  40152c:	b94027a0 	ldr	w0, [x29, #36]
  401530:	7100001f 	cmp	w0, #0x0
  401534:	5400008a 	b.ge	401544 <main+0xc4>  // b.tcont
  401538:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  40153c:	912a8000 	add	x0, x0, #0xaa0
  401540:	97fffdbb 	bl	400c2c <pabort>
  401544:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401548:	91038000 	add	x0, x0, #0xe0
  40154c:	aa0003e2 	mov	x2, x0
  401550:	d28d6021 	mov	x1, #0x6b01                	// #27393
  401554:	f2a80021 	movk	x1, #0x4001, lsl #16
  401558:	b94027a0 	ldr	w0, [x29, #36]
  40155c:	97fffd6d 	bl	400b10 <ioctl@plt>
  401560:	b9002ba0 	str	w0, [x29, #40]
  401564:	b9402ba0 	ldr	w0, [x29, #40]
  401568:	3100041f 	cmn	w0, #0x1
  40156c:	54000081 	b.ne	40157c <main+0xfc>  // b.any
  401570:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401574:	912ae000 	add	x0, x0, #0xab8
  401578:	97fffdad 	bl	400c2c <pabort>
  40157c:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401580:	91038000 	add	x0, x0, #0xe0
  401584:	aa0003e2 	mov	x2, x0
  401588:	d28d6021 	mov	x1, #0x6b01                	// #27393
  40158c:	f2b00021 	movk	x1, #0x8001, lsl #16
  401590:	b94027a0 	ldr	w0, [x29, #36]
  401594:	97fffd5f 	bl	400b10 <ioctl@plt>
  401598:	b9002ba0 	str	w0, [x29, #40]
  40159c:	b9402ba0 	ldr	w0, [x29, #40]
  4015a0:	3100041f 	cmn	w0, #0x1
  4015a4:	54000081 	b.ne	4015b4 <main+0x134>  // b.any
  4015a8:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  4015ac:	912b4000 	add	x0, x0, #0xad0
  4015b0:	97fffd9f 	bl	400c2c <pabort>
  4015b4:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4015b8:	91032000 	add	x0, x0, #0xc8
  4015bc:	aa0003e2 	mov	x2, x0
  4015c0:	d28d6061 	mov	x1, #0x6b03                	// #27395
  4015c4:	f2a80021 	movk	x1, #0x4001, lsl #16
  4015c8:	b94027a0 	ldr	w0, [x29, #36]
  4015cc:	97fffd51 	bl	400b10 <ioctl@plt>
  4015d0:	b9002ba0 	str	w0, [x29, #40]
  4015d4:	b9402ba0 	ldr	w0, [x29, #40]
  4015d8:	3100041f 	cmn	w0, #0x1
  4015dc:	54000081 	b.ne	4015ec <main+0x16c>  // b.any
  4015e0:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  4015e4:	912ba000 	add	x0, x0, #0xae8
  4015e8:	97fffd91 	bl	400c2c <pabort>
  4015ec:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4015f0:	91032000 	add	x0, x0, #0xc8
  4015f4:	aa0003e2 	mov	x2, x0
  4015f8:	d28d6061 	mov	x1, #0x6b03                	// #27395
  4015fc:	f2b00021 	movk	x1, #0x8001, lsl #16
  401600:	b94027a0 	ldr	w0, [x29, #36]
  401604:	97fffd43 	bl	400b10 <ioctl@plt>
  401608:	b9002ba0 	str	w0, [x29, #40]
  40160c:	b9402ba0 	ldr	w0, [x29, #40]
  401610:	3100041f 	cmn	w0, #0x1
  401614:	54000081 	b.ne	401624 <main+0x1a4>  // b.any
  401618:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  40161c:	912c0000 	add	x0, x0, #0xb00
  401620:	97fffd83 	bl	400c2c <pabort>
  401624:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401628:	91033000 	add	x0, x0, #0xcc
  40162c:	aa0003e2 	mov	x2, x0
  401630:	d28d6081 	mov	x1, #0x6b04                	// #27396
  401634:	f2a80081 	movk	x1, #0x4004, lsl #16
  401638:	b94027a0 	ldr	w0, [x29, #36]
  40163c:	97fffd35 	bl	400b10 <ioctl@plt>
  401640:	b9002ba0 	str	w0, [x29, #40]
  401644:	b9402ba0 	ldr	w0, [x29, #40]
  401648:	3100041f 	cmn	w0, #0x1
  40164c:	54000081 	b.ne	40165c <main+0x1dc>  // b.any
  401650:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  401654:	912c6000 	add	x0, x0, #0xb18
  401658:	97fffd75 	bl	400c2c <pabort>
  40165c:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401660:	91033000 	add	x0, x0, #0xcc
  401664:	aa0003e2 	mov	x2, x0
  401668:	d28d6081 	mov	x1, #0x6b04                	// #27396
  40166c:	f2b00081 	movk	x1, #0x8004, lsl #16
  401670:	b94027a0 	ldr	w0, [x29, #36]
  401674:	97fffd27 	bl	400b10 <ioctl@plt>
  401678:	b9002ba0 	str	w0, [x29, #40]
  40167c:	b9402ba0 	ldr	w0, [x29, #40]
  401680:	3100041f 	cmn	w0, #0x1
  401684:	54000081 	b.ne	401694 <main+0x214>  // b.any
  401688:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  40168c:	912cc000 	add	x0, x0, #0xb30
  401690:	97fffd67 	bl	400c2c <pabort>
  401694:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  401698:	9103e000 	add	x0, x0, #0xf8
  40169c:	b9400000 	ldr	w0, [x0]
  4016a0:	7100001f 	cmp	w0, #0x0
  4016a4:	5400018d 	b.le	4016d4 <main+0x254>
  4016a8:	b9002fbf 	str	wzr, [x29, #44]
  4016ac:	b94027a0 	ldr	w0, [x29, #36]
  4016b0:	97fffdff 	bl	400eac <transfer>
  4016b4:	90000000 	adrp	x0, 401000 <parse_opts+0x8c>
  4016b8:	912d2000 	add	x0, x0, #0xb48
  4016bc:	b9402fa1 	ldr	w1, [x29, #44]
  4016c0:	97fffd0c 	bl	400af0 <printf@plt>
  4016c4:	b9402fa0 	ldr	w0, [x29, #44]
  4016c8:	11000400 	add	w0, w0, #0x1
  4016cc:	b9002fa0 	str	w0, [x29, #44]
  4016d0:	17fffff7 	b	4016ac <main+0x22c>
  4016d4:	b94027a0 	ldr	w0, [x29, #36]
  4016d8:	97fffdf5 	bl	400eac <transfer>
  4016dc:	b0000080 	adrp	x0, 412000 <memcpy@GLIBC_2.17>
  4016e0:	9103f000 	add	x0, x0, #0xfc
  4016e4:	b9400000 	ldr	w0, [x0]
  4016e8:	7100001f 	cmp	w0, #0x0
  4016ec:	54000041 	b.ne	4016f4 <main+0x274>  // b.any
  4016f0:	97fffdad 	bl	400da4 <show_spi_xfrs>
  4016f4:	b94027a0 	ldr	w0, [x29, #36]
  4016f8:	97fffce2 	bl	400a80 <close@plt>
  4016fc:	b9402ba0 	ldr	w0, [x29, #40]
  401700:	a8c37bfd 	ldp	x29, x30, [sp], #48
  401704:	d65f03c0 	ret

0000000000401708 <__libc_csu_init>:
  401708:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40170c:	910003fd 	mov	x29, sp
  401710:	a901d7f4 	stp	x20, x21, [sp, #24]
  401714:	90000094 	adrp	x20, 411000 <__FRAME_END__+0xf260>
  401718:	90000095 	adrp	x21, 411000 <__FRAME_END__+0xf260>
  40171c:	91374294 	add	x20, x20, #0xdd0
  401720:	913722b5 	add	x21, x21, #0xdc8
  401724:	a902dff6 	stp	x22, x23, [sp, #40]
  401728:	cb150294 	sub	x20, x20, x21
  40172c:	f9001ff8 	str	x24, [sp, #56]
  401730:	2a0003f6 	mov	w22, w0
  401734:	aa0103f7 	mov	x23, x1
  401738:	9343fe94 	asr	x20, x20, #3
  40173c:	aa0203f8 	mov	x24, x2
  401740:	97fffc94 	bl	400990 <_init>
  401744:	b4000194 	cbz	x20, 401774 <__libc_csu_init+0x6c>
  401748:	f9000bb3 	str	x19, [x29, #16]
  40174c:	d2800013 	mov	x19, #0x0                   	// #0
  401750:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  401754:	aa1803e2 	mov	x2, x24
  401758:	aa1703e1 	mov	x1, x23
  40175c:	2a1603e0 	mov	w0, w22
  401760:	91000673 	add	x19, x19, #0x1
  401764:	d63f0060 	blr	x3
  401768:	eb13029f 	cmp	x20, x19
  40176c:	54ffff21 	b.ne	401750 <__libc_csu_init+0x48>  // b.any
  401770:	f9400bb3 	ldr	x19, [x29, #16]
  401774:	a941d7f4 	ldp	x20, x21, [sp, #24]
  401778:	a942dff6 	ldp	x22, x23, [sp, #40]
  40177c:	f9401ff8 	ldr	x24, [sp, #56]
  401780:	a8c47bfd 	ldp	x29, x30, [sp], #64
  401784:	d65f03c0 	ret

0000000000401788 <__libc_csu_fini>:
  401788:	d65f03c0 	ret

Disassembly of section .fini:

000000000040178c <_fini>:
  40178c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  401790:	910003fd 	mov	x29, sp
  401794:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401798:	d65f03c0 	ret
